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What’s Happening to Electronics Device ESD Sensitivity
Factory ESD control is expected to play an ever-increasing critical role as the industry is flooded with even more HBM (Human Body Model) and CDM (Charged Device Model) sensitive
designs.
ElectroStatic Discharge (ESD) is the hidden enemy within your factory. You cannot feel or see most ESD events but they can cause electronic components to fail or cause mysterious and annoying problems. There are two types of ESD damage: 1) catastrophic failures, and 2) latent defects. By definition, normal quality control inspections are able to identify catastrophic failures, but are not able to detect latent defects.
In general, the ESD susceptibility of modern electronics are more sensitive to ElectroStatic Discharge; that is the withstand voltages are lower. This is due to the drive for miniaturization and with electronic devices operating faster. Thus the semiconductor circuitry is getting smaller. What’s happening currently? The width of electronic device structures continues to get smaller. Intel began selling its 32nm processors in 2010 that would be 0.032 micrometer equal to 0.000032 millimeter or 0.00000128 inch.
See www.ESDA.org, the ESD Association’s latest White Paper “Electrostatic Discharge (ESD) Technology Roadmap” Revised April 2010 forecasts increased ESD sensitivities continuing the recent “trend, the ICs became even more sensitive to ESD events in the years between 2005 and 2009. Therefore, the prevailing trend is circuit performance at the expense of ESD protection levels.” The White Paper’s conclusions include:
- With devices becoming more sensitive through 2010-2015 and beyond, it is imperative that companies begin to scrutinize the ESD capabilities of their handling processes. Factory ESD control is expected to play an ever-increasing critical role as the industry is flooded with even more HBM (Human Body Model) and CDM (Charged Device Model) sensitive designs. For people handling ESD sensitive devices, personnel grounding systems must be designed to limit body voltages to less than 100 volts.
- To protect against metal-to-device discharges, all conductive elements that contact ESD sensitive devices must be grounded.
- To limit the possibilities of a field induced CDM ESD event, users of ESD sensitive devices should ensure that the maximum voltage induced on their devices is kept below 50 volts.
- To limit CDM ESD events, device pins should be contacted with static-dissipative material instead of metal wherever possible.
See May 2010 article by Dr. Terry L. Welsher The “Real” Cost of ESD Damage which includes “Recent data and experience reported by several companies and laboratories now suggest that many failures previously classified as EOS [Electrical Overstress] may instead be the result of ESD failures due to Charged Board Events (CBE). Some companies have estimated that about 50% of failures originally designated as EOS were actually CBE or CDE [Charged Device Events].”
ANSI/ESD S20.20, the ESD Association document covering the development of an ESD control program, lists numerous ESD Protected Area (EPA) ESD control items. Each company can pick and choose which ones are appropriate for their program. The selection of specific ESD control procedures or materials is at the option of the ESD Control Program Plan preparer and should be based on risk assessment and the established electrostatic discharge sensitivities of parts, assemblies, and equipment. [ANSI/ESD S20.20-2007 Annex B] “An EPA [ESD protected area] shall be established wherever ESDS [ESD Sensitive] products are handled. However, there are many different ways to establish ESD controls within an EPA. Table 3 lists some optional ESD control items which can be used to control static electricity. [ANSI/ESD S20.20-2007 section 8.3 ESD Protected Areas (EPAs)]
There are companies with good ESD control programs who are pleased with their quality and reliability results. But to maintain that level, they would be wise to consider ESD control program improvements. Now might be a good time to do that.
From published article “Now is the Time for ESD Control Programs to be Improved” by Fred Tenzer and Gene Felder. See full article at InCompliance Magazine– September 2012
Images of ESD Damage
Seeing ElectroStatic Discharge (ESD) damage is basically impossible. Damage to semiconductor device structure is NOT visible at ordinary magnifications of an optical microscope. If the microscope is capable of 1000X-1500X magnifications, you just might be able to “see” something. The method used, only occasionally as there is considerable expense, is by delayering and etch enhancement producing high magnification photographs using a scanning electron micrograph (SEM). See Images of ESD Damage, photos of Human Body Model (HBM) ESD damage provided by Hi-Rel Laboratories, Inc. at 6116 N Freya, Spokane, Washington 99217 (509-325-5800 or www.hrlabs.com). Used with their permission.
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