Blog Archives

What is the Real Cost of ESD Damage?

 Article written by Terry Welsher, courtesy of InCompliance Magazine 4Cbw

What percentage of electronic failures are latent defects? What’s the cost to industry? According to the ESD Association “It is relatively easy with the proper equipment to confirm that a device has experienced catastrophic failure. Basic performance tests will substantiate device damage. However, latent defects are extremely difficult to prove or detect using current technology, especially after the device is assembled into a finished product.” So there is the view that, by definition, it is impossible to quantify the amount of latent damage. However, for most companies, the cost of customer returns and field service warranty expense greatly exceeds in-house scrap & re-work expense.

Per the ESD Association: “The age of electronics brought with it new problems associated with static electricity and electrostatic discharge. And, as electronic devices became faster and smaller, their sensitivity to ESD increased. Today, ESD impacts productivity and product reliability in virtually every aspect of today’s electronics environment. Industry experts have estimated average product losses due to static to range [up to] 33%. Others estimate the actual cost of ESD damage to the electronics industry as running into the billions of dollars annually.”

Some major companies report that 25% of all identified electronic part failure is due to ESD. As an ESD Control Program improves, a resulting decrease in unidentified field failures and ”no problem found” returns should occur. Reducing latent defect field failures is what allows companies to report return on investments of 10:1 from their ESD Control Programs.

To continue reading The “Real” Cost of ESD Damage Click Here.

Tips for Addressing Charged Device Model Failures


CHARGED DEVICE MODEL

It may seem to some that CDM has newly arrived as a problem for ESD control programs. However, the ESD Association first published ANSI/ESD STM5.3.1 in 1999 – ESD Association Standard for Electrostatic Discharge Sensitivity Testing – Charged Device Model (CDM) – Component Level. Basically, CDM testing has to do with “testing, evaluating and classifying the electrostatic discharge (ESD) sensitivity of components to the defined charged device model (CDM)” … “to allow for accurate comparisons of component CDM ESD sensitivity levels.”

JESD22-C101C Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components Table 3
Devices shall be classified as follows:
CLASS I <200 volts
CLASS II 200 to <500 volts
CLASS III 500 to 1000 volts
CLASS IV >1000 volts

The importance of CDM came about primarily because of the increased use of automated component handling systems. The Foreword of ANSI/ESD STM5.3.1 states “In the CDM a component itself becomes charged (e.g., by sliding on a surface (tribocharging) or by electric field induction) and is rapidly discharged (by an ESD event) as it closely approaches a conductive object.”

In November 2002, Roger Peirce published an article entitled “The Most Common Causes of ESD Damage”. There were actually 23 causes. As the founder and president of ESD Technical Services, Roger had investigated hundreds of companies for over eight years. All 23 causes were CDM failure modes. So CDM is really not so new, it has just received a lot of attention in the last few years.


TACKLING CDM

So, what are the things companies should look at to improve their ESD control program regarding CDM? It would seem to be easy: don’t slide ESDS devices and assemblies unless grounded at all times, keep insulators at least 12” away from ESDS, and don’t allow ESDS items to make contact with a conductive surface. Seems simple, but in actual application . . . not so easy.

If the ESD control program has not used ionization that should be considered. If the ESDS items becomes charged, ionization will help neutralize the charge. The primary function of ionizers with regard to ESDS items are:

  • To remove / neutralize charges from process necessary insulators, which can charge ESDS items, thus creating the potential for a damaging CDM event
  • Remember that the PCB substrate is a process necessary insulator and can become charged during automated handling processes
  • To remove / neutralize charges from a charged, isolated/floating conductor, which, when grounded can result in a potentially damaging CDM event
  • Remember that during automated handling processes, the ESDS devices on the PCB are isolated or floating conductors

Application Photo Overhead Ionizer

The ESD Standards Committee has a Working Group (WG-17) which is currently involved with developing a Standard for Process Assessment to help the electronics community assess their manufacturing and handling processes to determine what levels of devices their process can handle. Once one fully understands where their process is with regards to ESDS devices and assemblies, they will have a clearer picture on what actions need to be taken to further improve the ESD Control Program.

If ionizers are already in use, the company should consider reducing the ionizer offset voltage limit of ±50 volts (the required limit in ANSI/ESD S20.20) to ±25 volts and maybe less, depending on the application and device sensitivity. Discharge times are user defined and should be considered for reducing the time required to neutralize a ± 1,000 volt charge to ± 100 volts.

The required limit for worksurfaces per ANSI/ESD S20.20 is less than 1 x 10^9 ohms with no lower limit. Most companies handling electronics should be following the recommendation of Worksurface standard ANSI/ESD S4.1 that the lower limit be 1 x 10^6 ohms. To combat CDM failures, all surfaces that might come into contact with ESDS items should be dissipative at the 1 x 10^6 to less than 1 x 10^9 ohms range used for worksurfaces where possible. Items such as Static Shielding bags will have a higher resistance on the interior & exterior surfaces, but it still must be less than 1 x 10^11 ohms.

Application Photo Statfree Worksurface Mat

From published article “Now is the Time for ESD Control Programs to be Improved” by Fred Tenzer and Gene Felder. See full article at InCompliance Magazine- September 2012

What’s Happening to Electronics Device ESD Sensitivity

Factory ESD control is expected to play an ever-increasing critical role as the industry is flooded with even more HBM (Human Body Model) and CDM (Charged Device Model) sensitive
designs.

ElectroStatic Discharge (ESD) is the hidden enemy within your factory. You cannot feel or see most ESD events but they can cause electronic components to fail or cause mysterious and annoying problems. There are two types of ESD damage: 1) catastrophic failures, and 2) latent defects. By definition, normal quality control inspections are able to identify catastrophic failures, but are not able to detect latent defects.

In general, the ESD susceptibility of modern electronics are more sensitive to ElectroStatic Discharge; that is the withstand voltages are lower. This is due to the drive for miniaturization and with electronic devices operating faster. Thus the semiconductor circuitry is getting smaller. What’s happening currently? The width of electronic device structures continues to get smaller. Intel began selling its 32nm processors in 2010 that would be 0.032 micrometer equal to 0.000032 millimeter or 0.00000128 inch.

See www.ESDA.org, the ESD Association’s latest White Paper “Electrostatic Discharge (ESD) Technology Roadmap” Revised April 2010” forecasts increased ESD sensitivities continuing the recent “trend, the ICs became even more sensitive to ESD events in the years between 2005 and 2009. Therefore, the prevailing trend is circuit performance at the expense of ESD protection levels.” The White Paper’s conclusions include:

  • With devices becoming more sensitive through 2010-2015 and beyond, it is imperative that companies begin to scrutinize the ESD capabilities of their handling processes. Factory ESD control is expected to play an ever-increasing critical role as the industry is flooded with even more HBM (Human Body Model) and CDM (Charged Device Model) sensitive designs. For people handling ESD sensitive devices, personnel grounding systems must be designed to limit body voltages to less than 100 volts.
  • To protect against metal-to-device discharges, all conductive elements that contact ESD sensitive devices must be grounded.
  • To limit the possibilities of a field induced CDM ESD event, users of ESD sensitive devices should ensure that the maximum voltage induced on their devices is kept below 50 volts.
  • To limit CDM ESD events, device pins should be contacted with static-dissipative material instead of metal wherever possible.

See May 2010 article by Dr. Terry L. Welsher The “Real” Cost of ESD Damage which includes “Recent data and experience reported by several companies and laboratories now suggest that many failures previously classified as EOS [Electrical Overstress] may instead be the result of ESD failures due to Charged Board Events (CBE). Some companies have estimated that about 50% of failures originally designated as EOS were actually CBE or CDE [Charged Device Events].”

ANSI/ESD S20.20, the ESD Association document covering the development of an ESD control program, lists numerous ESD Protected Area (EPA) ESD control items. Each company can pick and choose which ones are appropriate for their program. The selection of specific ESD control procedures or materials is at the option of the ESD Control Program Plan preparer and should be based on risk assessment and the established electrostatic discharge sensitivities of parts, assemblies, and equipment.” [ANSI/ESD S20.20-2007 Annex B] “An EPA [ESD protected area] shall be established wherever ESDS [ESD Sensitive] products are handled. However, there are many different ways to establish ESD controls within an EPA. Table 3 lists some optional ESD control items which can be used to control static electricity. [ANSI/ESD S20.20-2007 section 8.3 ESD Protected Areas (EPAs)]

There are companies with good ESD control programs who are pleased with their quality and reliability results. But to maintain that level, they would be wise to consider ESD control program improvements. Now might be a good time to do that.

From published article “Now is the Time for ESD Control Programs to be Improved” by Fred Tenzer and Gene Felder. See full article at InCompliance Magazine– September 2012

Images of ESD Damage

Seeing ElectroStatic Discharge (ESD) damage is basically impossible. Damage to semiconductor device structure is NOT visible at ordinary magnifications of an optical microscope. If the microscope is capable of 1000X-1500X magnifications, you just might be able to “see” something. The method used, only occasionally as there is considerable expense, is by delayering and etch enhancement producing high magnification photographs using a scanning electron micrograph (SEM). See Images of ESD Damage, photos of Human Body Model (HBM) ESD damage provided by Hi-Rel Laboratories, Inc. at 6116 N Freya, Spokane, Washington 99217 (509-325-5800 or www.hrlabs.com). Used with their permission.

ESD Control Program Periodic Verification

by Fred Tenzer and Gene Felder, Desco Industries, Inc.

Some practical advice for implementing
ESD control periodic checks
Want to accomplish something important? A familiar formula is write a plan, select the specifications, and then periodically test to verify that the plan is being implemented according to the test
results. This is basically the requirements of an ESD control program, per the ESD Association standard, ANSI/ESD S20.20. This important standard, entitled Development of an Electrostatic Discharge Control Program, covers the requirements necessary to design, establish, implement, and maintain an ESD control program to protect electrical or electronic parts, assemblies and equipment susceptible to ESD damage.
S20.20 is a process document, and provides ESD control plan guidance; one of its requirements is having a “compliance verification plan” as a component of the ESD control plan. Per S20.20, paragraph 6.1.3., Compliance Verification Plan:
“A Compliance Verification Plan shall be established to ensure the organization’s compliance with the requirements of the Plan. Formal audits or certifications shall be conducted in accordance with a Compliance Verification Plan that identifies the requirements to be verified, and the frequency at which those verifications must occur. Test equipment shall be selected to make measurements of appropriate properties of the technical requirements that are incorporated into the ESD program plan.”
To view more information on ESD Control Program Periodic Verification CLICK HERE

ESD Control Programs Should be Improved

ElectroStatic Discharge (ESD) is the hidden enemy within your factory. You cannot feel or see most ESD events but they can cause electronic components to fail or cause mysterious and annoying problems. There are two types of ESD damage: 1) Catastrophic failures, and 2) Latent defects. By definition, normal quality control inspections are able to identify catastrophic failures, but are not able to detect latent defects.

In general, the ESD susceptibility of modern electronics are more sensitive to ElectroStatic Discharge; that is the withstand voltages are lower. This is due to the drive for miniaturization particularly with electronic devices operating faster. Thus the semiconductor circuitry is getting smaller.

See November 2001 Evaluation Engineering Magazine article “ESD Control Program Development” “As the drive for miniaturization has reduced the width of electronic device structures to as small as 0.10 micrometer (equal to 0.0001 millimeter or 0.000004 inch), electronic components are being manufactured with increased ElectroStatic Discharge (ESD) susceptibility.”

What’s happening currently? Intel began selling its 32 nm processors in 2010 that would be 0.032 micrometer equal to 0.000032 millimeter or 0.00000128 inch.

See www.ESDA.org, the ESD Association’s latest White Paper “Electrostatic Discharge (ESD) Technology Roadmap – Revised April 2010” forecasts increased ESD sensitivities continuing the recent “trend, the ICs became even more sensitive to ESD events in the years between 2005 and 2009. Therefore, the prevailing trend is circuit performance at the expense of ESD protection levels.” The White Paper’s conclusions are:

“With devices becoming more sensitive through 2010-2015 and beyond, it is imperative that companies begin to scrutinize the ESD capabilities of their handling processes. Factory ESD control is expected to play an ever-increasing critical role as the industry is flooded with even more HBM and CDM sensitive designs. For people handling ESD sensitive devices, personnel grounding systems must be designed to limit body voltages to less than 100 volts.

To protect against metal-to-device discharges, all conductive elements that contact ESD sensitive devices must be grounded.

To limit the possibilities of a field induced CDM ESD event, users of ESD sensitive devices should ensure that the maximum voltage induced on their devices is kept below 50 volts.

To limit CDM ESD events, device pins should be contacted with static-dissipative material instead of metal wherever possible.”

See InCompliance Magazine May 2010 article by Dr. Terry L. Welsher The “Real” Cost of ESD Damage which includes “Recent data and experience reported by several companies and laboratories now suggest that many failures previously classified as EOS may instead be the result of ESD failures due to Charged Board Events (CBE). … Some companies have estimated that about 50% of failures originally designated as EOS were actually CBE or CDE.”

Protektive Pak Logo

How to Measure a Circuit Board

Drawings show how a circuit board fits into an In-Plant Handler. Measurements should be given by LENGTH first, then WIDTH, and last THICKNESS.

LENGTH: is the dimension of the circuit board as it fits top to bottom in the box.
WIDTH: is the dimension of the circuit board as it fits left to right in the box.
THICKNESS: is the dimension of the circuit board as it fits between the dividing cells in the box.

Your Circuit Board is:
Length_______” x Width_______” x Thickness_______”

How to measure a circuit board

A Circuit Board with
a measurement of:
4-1/2″L x 7″W x 1/2″T
would measure like this:
NOTE: The length of the circuit board fits into
the depth of the box.

How to measure a circuit board in an In-Plant Handler

In measuring a circuit board, you must be aware of any components or leads that extend past the board. These extended parts could be damaged if loaded into the cell and placed at the bottom of the In-Plant Handler. Therefore, make sure that the width dimension has no protrusions. If your board has protrusions, then reverse the length and width dimensions to make sure your board fits properly in the In-Plant Handler. When in doubt, send us a sample of your circuit board.

How You Measure a CIRCUIT BOARD is DIFFERENT than How You Measure a BOX.
Please remember . . . HOW you measure makes a difference!

Click Here for more measurement information.